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3:03 PM
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AUG, 2010 ·   
 Adding new features while lowering the power  consumption of IT equipments is in every manufacturer agenda. One of the top  candidates in achieving this power reduction is within memory devices, shifting  the demand for low-powered high-speed memory devices. This has lead researchers  and manufactures to non-volatile devices requiring power for only read and write  data and not for retaining data. An ideal candidate is RRAM, a new non-volatile  memory type which are being developed by many companies. The technology comes  with some similarities to CBRAM as well as phase change memory. So far different  type of RRAM has been proposed based on various dielectric materials, from  perovskites to transitional metal oxides and chalcogenides. Based on this, group  of researchers at AIST  (National Institute of Advance Industrial Science and Technology), Sharp  Corporation, Institute of Semiconductor &Electronics Technologies of ULVAC  and Professor Kazuya Nakayama and Akio Kitagawa of Kanazawa University has  successfully, developed a process for integrating low-power, high-speed non-volatile  resistance random access memory (RRAM) devices on a 128-kbit memory chip.
Adding new features while lowering the power  consumption of IT equipments is in every manufacturer agenda. One of the top  candidates in achieving this power reduction is within memory devices, shifting  the demand for low-powered high-speed memory devices. This has lead researchers  and manufactures to non-volatile devices requiring power for only read and write  data and not for retaining data. An ideal candidate is RRAM, a new non-volatile  memory type which are being developed by many companies. The technology comes  with some similarities to CBRAM as well as phase change memory. So far different  type of RRAM has been proposed based on various dielectric materials, from  perovskites to transitional metal oxides and chalcogenides. Based on this, group  of researchers at AIST  (National Institute of Advance Industrial Science and Technology), Sharp  Corporation, Institute of Semiconductor &Electronics Technologies of ULVAC  and Professor Kazuya Nakayama and Akio Kitagawa of Kanazawa University has  successfully, developed a process for integrating low-power, high-speed non-volatile  resistance random access memory (RRAM) devices on a 128-kbit memory chip.  
The team has also succeeded to fabricate chip  arrays on an 8-inch wafer. The RRAM chip array fabrication was done using the  existing semiconductor manufacturing process, avoiding the use of high cost  components such as noble metal electrodes as well as materials requiring special  handling, resulting in a cost competitive memory devices. The institute is  currently working to resolve all issues associated with commercialization of the  new device at the array and chip levels for is early application and  commercialization.